Description of the Prior Art
Integated circuits (ICs) typically communicate with one another by means of one or more multi-conductor busses. For example, a 32-bit microprocessor IC may use 32 conductors to send a 32-bit data word to another integated circuit, or to an external input/output device. Several busses may be required, with the use of separate busses for data and addresses often being used. In other cases, a given bus may be multiplexed so that it may perform two or more functions at different times. In some cases, the output buffers that drive the bus are always active, so that either a valid logic "1" or "0" is always present on the bus. However, in other cases, the output buffers are capable of being placed in the "tristate" (high output impedance) condition. In that case, neither a high nor low logic state is provided by the output buffer. Therefore, the bus voltage is free to float when all of the integated circuits connected to the bus are in the tri-state condition. It is frequently the case that resistors are connected from the bus conductors to a given power supply voltage, in order to prevent the bus from floating. This is especially true in busses that connect to devices having field effect transistor input stages. For example, CMOS input buffers having serially connected p-channel and n-channel input transistors which have their gates coupled to the input node may draw a large current when the input node floats in the vicinity of the buffer switching point (typically about 1/2 V.sub.DD).
An illustrative prior art bus is shown in FIG. 1, wherein the resistors R.sub.l. . . R.sub.n pull the bus conductors l . . . n to the V.sub.DD power supply voltage level when all the output buffers O.sub.l. . . O.sub.n connected to the bus are placed in the tristate condition. As noted above, it is desirable to avoid allowing the conductors to float at an intermediate state between power supply voltage levels, as that could allow the field effect transistor input buffers I.sub.1. . . I.sub.n to draw excessive currents. However, the pull-up resistors R.sub.l. . . R.sub.n themselves cause some power dissipation to occur when the bus is active. That is, when an output buffer places a "0" (i.e., low voltage) on a given conductor, current flows through the corresponding resistor. (Alternatively, the resistors could connect the bus to V.sub.ss, in which case the current flow would occur when a "1" is driven onto the bus). Since the value of the resistors are typically in the range of from about 1 k ohm to 10 k ohms, several milliamps of current may flow when the bus is active.
It has become especially desirable to minimize the current drain associated with integrated circuits that are used in battery-powered devices. These include, for example, laptop and notebook computers, cellular phones, video terminals, etc. In many cases, the amount of power dissipated in the bus resistors (R.sub.l. . . R.sub.n) is a significant portion of the total power dissipation. Furthermore, as the size of on-chip cache memories increase, the number of bus transactions to external memories tends to be reduced. Therefore, the idle time on the external bus tends to increase, and power dissipation on a floating bus (due primarily to current flow in input buffers) would also increase. Hence, the necessity of using resistors in an attempt to limit the dissipation also tends to increase in prior art bus schemes.